/*
 * Copyright (c) 2021 Futurewei Technologies, Inc.
 *
 * clang2mpl is licensed under Mulan PSL v2.
 * You can use this software according to the terms and conditions of the Mulan
 * PSL v2. You may obtain a copy of Mulan PSL v2 at:
 *
 *     http://license.coscl.org.cn/MulanPSL2
 *
 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY
 * KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
 * NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. See the
 * Mulan PSL v2 for more details.
 */
// RUN: %clang2mpl --ascii --verify %s -- --target=aarch64-linux-elf -Wno-unused-value
// RUN: cat %m | %FileCheck %s

#include "arm_neon.h"

// CHECK: [[# FILENUM:]] "{{.*}}/test/vector.c"

void intrinsics() {
  int8_t scalar_int8;
  int16_t scalar_int16;
  int32_t scalar_int32;
  int64_t scalar_int64;
  uint8_t scalar_uint8;
  uint16_t scalar_uint16;
  uint32_t scalar_uint32;
  uint64_t scalar_uint64;
  float32_t scalar_float32;
  float64_t scalar_float64;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int8x8 v8i8
  int8x8_t vec_int8x8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int8x16 v16i8
  int8x16_t vec_int8x16;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int16x4 v4i16
  int16x4_t vec_int16x4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int16x8 v8i16
  int16x8_t vec_int16x8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int32x2 v2i32
  int32x2_t vec_int32x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int32x4 v4i32
  int32x4_t vec_int32x4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int64x1 i64
  int64x1_t vec_int64x1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_int64x2 v2i64
  int64x2_t vec_int64x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint8x8 v8u8
  uint8x8_t vec_uint8x8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint8x16 v16u8
  uint8x16_t vec_uint8x16;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint16x4 v4u16
  uint16x4_t vec_uint16x4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint16x8 v8u16
  uint16x8_t vec_uint16x8;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint32x2 v2u32
  uint32x2_t vec_uint32x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint32x4 v4u32
  uint32x4_t vec_uint32x4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint64x1 u64
  uint64x1_t vec_uint64x1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_uint64x2 v2u64
  uint64x2_t vec_uint64x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_float32x2 v2f32
  float32x2_t vec_float32x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_float32x4 v4f32
  float32x4_t vec_float32x4;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_float64x1 f64
  float64x1_t vec_float64x1;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: var %vec_float64x2 v2f64
  float64x2_t vec_float64x2;
  void *ptr;

  int8x8x2_t vec_int8x8x2;
  int16x4x2_t vec_int16x4x2;
  int32x2x2_t vec_int32x2x2;
  uint8x8x2_t vec_uint8x8x2;
  uint16x4x2_t vec_uint16x4x2;
  uint32x2x2_t vec_uint32x2x2;
  float32x2x2_t vec_float32x2x2;

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_from_scalar_v2i64 (dread i64 %scalar_int64))
  vec_int64x2 = __builtin_mpl_vector_from_scalar_v2i64(scalar_int64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_from_scalar_v4i32 (dread i32 %scalar_int32))
  vec_int32x4 = __builtin_mpl_vector_from_scalar_v4i32(scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_from_scalar_v8i16 (dread i32 %scalar_int16))
  vec_int16x8 = __builtin_mpl_vector_from_scalar_v8i16(scalar_int16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (intrinsicop v16i8 vector_from_scalar_v16i8 (dread i32 %scalar_int8))
  vec_int8x16 = __builtin_mpl_vector_from_scalar_v16i8(scalar_int8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_from_scalar_v2u64 (dread u64 %scalar_uint64))
  vec_uint64x2 = __builtin_mpl_vector_from_scalar_v2u64(scalar_uint64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_from_scalar_v4u32 (dread u32 %scalar_uint32))
  vec_uint32x4 = __builtin_mpl_vector_from_scalar_v4u32(scalar_uint32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_from_scalar_v8u16 (dread u32 %scalar_uint16))
  vec_uint16x8 = __builtin_mpl_vector_from_scalar_v8u16(scalar_uint16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (intrinsicop v16u8 vector_from_scalar_v16u8 (dread u32 %scalar_uint8))
  vec_uint8x16 = __builtin_mpl_vector_from_scalar_v16u8(scalar_uint8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (intrinsicop v2f64 vector_from_scalar_v2f64 (dread f64 %scalar_float64))
  vec_float64x2 = __builtin_mpl_vector_from_scalar_v2f64(scalar_float64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (intrinsicop v4f32 vector_from_scalar_v4f32 (dread f32 %scalar_float32))
  vec_float32x4 = __builtin_mpl_vector_from_scalar_v4f32(scalar_float32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_from_scalar_v1i64 (dread i64 %scalar_int64))
  vec_int64x1 = __builtin_mpl_vector_from_scalar_v1i64(scalar_int64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_from_scalar_v2i32 (dread i32 %scalar_int32))
  vec_int32x2 = __builtin_mpl_vector_from_scalar_v2i32(scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_from_scalar_v4i16 (dread i32 %scalar_int16))
  vec_int16x4 = __builtin_mpl_vector_from_scalar_v4i16(scalar_int16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_from_scalar_v8i8 (dread i32 %scalar_int8))
  vec_int8x8 = __builtin_mpl_vector_from_scalar_v8i8(scalar_int8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_from_scalar_v1u64 (dread u64 %scalar_uint64))
  vec_uint64x1 = __builtin_mpl_vector_from_scalar_v1u64(scalar_uint64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_from_scalar_v2u32 (dread u32 %scalar_uint32))
  vec_uint32x2 = __builtin_mpl_vector_from_scalar_v2u32(scalar_uint32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_from_scalar_v4u16 (dread u32 %scalar_uint16))
  vec_uint16x4 = __builtin_mpl_vector_from_scalar_v4u16(scalar_uint16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_from_scalar_v8u8 (dread u32 %scalar_uint8))
  vec_uint8x8 = __builtin_mpl_vector_from_scalar_v8u8(scalar_uint8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_from_scalar_v1f64 (dread f64 %scalar_float64))
  vec_float64x1 = __builtin_mpl_vector_from_scalar_v1f64(scalar_float64);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_from_scalar_v2f32 (dread f32 %scalar_float32))
  vec_float32x2 = __builtin_mpl_vector_from_scalar_v2f32(scalar_float32);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_madd_v2i32 (dread v2i64 %vec_int64x2, dread v2i32 %vec_int32x2, dread v2i32 %vec_int32x2))
  vec_int64x2 = __builtin_mpl_vector_madd_v2i32(vec_int64x2, vec_int32x2, vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_madd_v4i16 (dread v4i32 %vec_int32x4, dread v4i16 %vec_int16x4, dread v4i16 %vec_int16x4))
  vec_int32x4 = __builtin_mpl_vector_madd_v4i16(vec_int32x4, vec_int16x4, vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_madd_v8i8 (dread v8i16 %vec_int16x8, dread v8i8 %vec_int8x8, dread v8i8 %vec_int8x8))
  vec_int16x8 = __builtin_mpl_vector_madd_v8i8(vec_int16x8, vec_int8x8, vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_madd_v2u32 (dread v2u64 %vec_uint64x2, dread v2u32 %vec_uint32x2, dread v2u32 %vec_uint32x2))
  vec_uint64x2 = __builtin_mpl_vector_madd_v2u32(vec_uint64x2, vec_uint32x2, vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_madd_v4u16 (dread v4u32 %vec_uint32x4, dread v4u16 %vec_uint16x4, dread v4u16 %vec_uint16x4))
  vec_uint32x4 = __builtin_mpl_vector_madd_v4u16(vec_uint32x4, vec_uint16x4, vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_madd_v8u8 (dread v8u16 %vec_uint16x8, dread v8u8 %vec_uint8x8, dread v8u8 %vec_uint8x8))
  vec_uint16x8 = __builtin_mpl_vector_madd_v8u8(vec_uint16x8, vec_uint8x8, vec_uint8x8);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_mul_v2i32 (dread v2i32 %vec_int32x2, dread v2i32 %vec_int32x2))
  vec_int64x2 = __builtin_mpl_vector_mul_v2i32(vec_int32x2, vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_mul_v4i16 (dread v4i16 %vec_int16x4, dread v4i16 %vec_int16x4))
  vec_int32x4 = __builtin_mpl_vector_mul_v4i16(vec_int16x4, vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_mul_v8i8 (dread v8i8 %vec_int8x8, dread v8i8 %vec_int8x8))
  vec_int16x8 = __builtin_mpl_vector_mul_v8i8(vec_int8x8, vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_mul_v2u32 (dread v2u32 %vec_uint32x2, dread v2u32 %vec_uint32x2))
  vec_uint64x2 = __builtin_mpl_vector_mul_v2u32(vec_uint32x2, vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_mul_v4u16 (dread v4u16 %vec_uint16x4, dread v4u16 %vec_uint16x4))
  vec_uint32x4 = __builtin_mpl_vector_mul_v4u16(vec_uint16x4, vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_mul_v8u8 (dread v8u8 %vec_uint8x8, dread v8u8 %vec_uint8x8))
  vec_uint16x8 = __builtin_mpl_vector_mul_v8u8(vec_uint8x8, vec_uint8x8);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_merge_v2i64 (dread v2i64 %vec_int64x2, dread v2i64 %vec_int64x2, dread i32 %scalar_int32))
  vec_int64x2 = __builtin_mpl_vector_merge_v2i64(vec_int64x2, vec_int64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_merge_v4i32 (dread v4i32 %vec_int32x4, dread v4i32 %vec_int32x4, dread i32 %scalar_int32))
  vec_int32x4 = __builtin_mpl_vector_merge_v4i32(vec_int32x4, vec_int32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_merge_v8i16 (dread v8i16 %vec_int16x8, dread v8i16 %vec_int16x8, dread i32 %scalar_int32))
  vec_int16x8 = __builtin_mpl_vector_merge_v8i16(vec_int16x8, vec_int16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (intrinsicop v16i8 vector_merge_v16i8 (dread v16i8 %vec_int8x16, dread v16i8 %vec_int8x16, dread i32 %scalar_int32))
  vec_int8x16 = __builtin_mpl_vector_merge_v16i8(vec_int8x16, vec_int8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_merge_v2u64 (dread v2u64 %vec_uint64x2, dread v2u64 %vec_uint64x2, dread i32 %scalar_int32))
  vec_uint64x2 = __builtin_mpl_vector_merge_v2u64(vec_uint64x2, vec_uint64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_merge_v4u32 (dread v4u32 %vec_uint32x4, dread v4u32 %vec_uint32x4, dread i32 %scalar_int32))
  vec_uint32x4 = __builtin_mpl_vector_merge_v4u32(vec_uint32x4, vec_uint32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_merge_v8u16 (dread v8u16 %vec_uint16x8, dread v8u16 %vec_uint16x8, dread i32 %scalar_int32))
  vec_uint16x8 = __builtin_mpl_vector_merge_v8u16(vec_uint16x8, vec_uint16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (intrinsicop v16u8 vector_merge_v16u8 (dread v16u8 %vec_uint8x16, dread v16u8 %vec_uint8x16, dread i32 %scalar_int32))
  vec_uint8x16 = __builtin_mpl_vector_merge_v16u8(vec_uint8x16, vec_uint8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (intrinsicop v2f64 vector_merge_v2f64 (dread v2f64 %vec_float64x2, dread v2f64 %vec_float64x2, dread i32 %scalar_int32))
  vec_float64x2 = __builtin_mpl_vector_merge_v2f64(vec_float64x2, vec_float64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (intrinsicop v4f32 vector_merge_v4f32 (dread v4f32 %vec_float32x4, dread v4f32 %vec_float32x4, dread i32 %scalar_int32))
  vec_float32x4 = __builtin_mpl_vector_merge_v4f32(vec_float32x4, vec_float32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_merge_v1i64 (dread i64 %vec_int64x1, dread i64 %vec_int64x1, dread i32 %scalar_int32))
  vec_int64x1 = __builtin_mpl_vector_merge_v1i64(vec_int64x1, vec_int64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_merge_v2i32 (dread v2i32 %vec_int32x2, dread v2i32 %vec_int32x2, dread i32 %scalar_int32))
  vec_int32x2 = __builtin_mpl_vector_merge_v2i32(vec_int32x2, vec_int32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_merge_v4i16 (dread v4i16 %vec_int16x4, dread v4i16 %vec_int16x4, dread i32 %scalar_int32))
  vec_int16x4 = __builtin_mpl_vector_merge_v4i16(vec_int16x4, vec_int16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_merge_v8i8 (dread v8i8 %vec_int8x8, dread v8i8 %vec_int8x8, dread i32 %scalar_int32))
  vec_int8x8 = __builtin_mpl_vector_merge_v8i8(vec_int8x8, vec_int8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_merge_v1u64 (dread u64 %vec_uint64x1, dread u64 %vec_uint64x1, dread i32 %scalar_int32))
  vec_uint64x1 = __builtin_mpl_vector_merge_v1u64(vec_uint64x1, vec_uint64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_merge_v2u32 (dread v2u32 %vec_uint32x2, dread v2u32 %vec_uint32x2, dread i32 %scalar_int32))
  vec_uint32x2 = __builtin_mpl_vector_merge_v2u32(vec_uint32x2, vec_uint32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_merge_v4u16 (dread v4u16 %vec_uint16x4, dread v4u16 %vec_uint16x4, dread i32 %scalar_int32))
  vec_uint16x4 = __builtin_mpl_vector_merge_v4u16(vec_uint16x4, vec_uint16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_merge_v8u8 (dread v8u8 %vec_uint8x8, dread v8u8 %vec_uint8x8, dread i32 %scalar_int32))
  vec_uint8x8 = __builtin_mpl_vector_merge_v8u8(vec_uint8x8, vec_uint8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_merge_v1f64 (dread f64 %vec_float64x1, dread f64 %vec_float64x1, dread i32 %scalar_int32))
  vec_float64x1 = __builtin_mpl_vector_merge_v1f64(vec_float64x1, vec_float64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_merge_v2f32 (dread v2f32 %vec_float32x2, dread v2f32 %vec_float32x2, dread i32 %scalar_int32))
  vec_float32x2 = __builtin_mpl_vector_merge_v2f32(vec_float32x2, vec_float32x2, scalar_int32);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_get_low_v2i64 (dread v2i64 %vec_int64x2))
  vec_int64x1 = __builtin_mpl_vector_get_low_v2i64(vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_get_low_v4i32 (dread v4i32 %vec_int32x4))
  vec_int32x2 = __builtin_mpl_vector_get_low_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_get_low_v8i16 (dread v8i16 %vec_int16x8))
  vec_int16x4 = __builtin_mpl_vector_get_low_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_get_low_v16i8 (dread v16i8 %vec_int8x16))
  vec_int8x8 = __builtin_mpl_vector_get_low_v16i8(vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_get_low_v2u64 (dread v2u64 %vec_uint64x2))
  vec_uint64x1 = __builtin_mpl_vector_get_low_v2u64(vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_get_low_v4u32 (dread v4u32 %vec_uint32x4))
  vec_uint32x2 = __builtin_mpl_vector_get_low_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_get_low_v8u16 (dread v8u16 %vec_uint16x8))
  vec_uint16x4 = __builtin_mpl_vector_get_low_v8u16(vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_get_low_v16u8 (dread v16u8 %vec_uint8x16))
  vec_uint8x8 = __builtin_mpl_vector_get_low_v16u8(vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_get_low_v2f64 (dread v2f64 %vec_float64x2))
  vec_float64x1 = __builtin_mpl_vector_get_low_v2f64(vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_get_low_v4f32 (dread v4f32 %vec_float32x4))
  vec_float32x2 = __builtin_mpl_vector_get_low_v4f32(vec_float32x4);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_get_high_v2i64 (dread v2i64 %vec_int64x2))
  vec_int64x1 = __builtin_mpl_vector_get_high_v2i64(vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_get_high_v4i32 (dread v4i32 %vec_int32x4))
  vec_int32x2 = __builtin_mpl_vector_get_high_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_get_high_v8i16 (dread v8i16 %vec_int16x8))
  vec_int16x4 = __builtin_mpl_vector_get_high_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_get_high_v16i8 (dread v16i8 %vec_int8x16))
  vec_int8x8 = __builtin_mpl_vector_get_high_v16i8(vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_get_high_v2u64 (dread v2u64 %vec_uint64x2))
  vec_uint64x1 = __builtin_mpl_vector_get_high_v2u64(vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_get_high_v4u32 (dread v4u32 %vec_uint32x4))
  vec_uint32x2 = __builtin_mpl_vector_get_high_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_get_high_v8u16 (dread v8u16 %vec_uint16x8))
  vec_uint16x4 = __builtin_mpl_vector_get_high_v8u16(vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_get_high_v16u8 (dread v16u8 %vec_uint8x16))
  vec_uint8x8 = __builtin_mpl_vector_get_high_v16u8(vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_get_high_v2f64 (dread v2f64 %vec_float64x2))
  vec_float64x1 = __builtin_mpl_vector_get_high_v2f64(vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_get_high_v4f32 (dread v4f32 %vec_float32x4))
  vec_float32x2 = __builtin_mpl_vector_get_high_v4f32(vec_float32x4);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int64 0 (intrinsicop i64 vector_get_element_v2i64 (dread v2i64 %vec_int64x2, dread i32 %scalar_int32))
  scalar_int64 = __builtin_mpl_vector_get_element_v2i64(vec_int64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int32 0 (intrinsicop i32 vector_get_element_v4i32 (dread v4i32 %vec_int32x4, dread i32 %scalar_int32))
  scalar_int32 = __builtin_mpl_vector_get_element_v4i32(vec_int32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int16 0 (intrinsicop i16 vector_get_element_v8i16 (dread v8i16 %vec_int16x8, dread i32 %scalar_int32))
  scalar_int16 = __builtin_mpl_vector_get_element_v8i16(vec_int16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int8 0 (intrinsicop i8 vector_get_element_v16i8 (dread v16i8 %vec_int8x16, dread i32 %scalar_int32))
  scalar_int8 = __builtin_mpl_vector_get_element_v16i8(vec_int8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint64 0 (intrinsicop u64 vector_get_element_v2u64 (dread v2u64 %vec_uint64x2, dread i32 %scalar_int32))
  scalar_uint64 = __builtin_mpl_vector_get_element_v2u64(vec_uint64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint32 0 (intrinsicop u32 vector_get_element_v4u32 (dread v4u32 %vec_uint32x4, dread i32 %scalar_int32))
  scalar_uint32 = __builtin_mpl_vector_get_element_v4u32(vec_uint32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint16 0 (intrinsicop u16 vector_get_element_v8u16 (dread v8u16 %vec_uint16x8, dread i32 %scalar_int32))
  scalar_uint16 = __builtin_mpl_vector_get_element_v8u16(vec_uint16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint8 0 (intrinsicop u8 vector_get_element_v16u8 (dread v16u8 %vec_uint8x16, dread i32 %scalar_int32))
  scalar_uint8 = __builtin_mpl_vector_get_element_v16u8(vec_uint8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float64 0 (intrinsicop f64 vector_get_element_v2f64 (dread v2f64 %vec_float64x2, dread i32 %scalar_int32))
  scalar_float64 = __builtin_mpl_vector_get_element_v2f64(vec_float64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float32 0 (intrinsicop f32 vector_get_element_v4f32 (dread v4f32 %vec_float32x4, dread i32 %scalar_int32))
  scalar_float32 = __builtin_mpl_vector_get_element_v4f32(vec_float32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int64 0 (intrinsicop i64 vector_get_element_v1i64 (dread i64 %vec_int64x1, dread i32 %scalar_int32))
  scalar_int64 = __builtin_mpl_vector_get_element_v1i64(vec_int64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int32 0 (intrinsicop i32 vector_get_element_v2i32 (dread v2i32 %vec_int32x2, dread i32 %scalar_int32))
  scalar_int32 = __builtin_mpl_vector_get_element_v2i32(vec_int32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int16 0 (intrinsicop i16 vector_get_element_v4i16 (dread v4i16 %vec_int16x4, dread i32 %scalar_int32))
  scalar_int16 = __builtin_mpl_vector_get_element_v4i16(vec_int16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int8 0 (intrinsicop i8 vector_get_element_v8i8 (dread v8i8 %vec_int8x8, dread i32 %scalar_int32))
  scalar_int8 = __builtin_mpl_vector_get_element_v8i8(vec_int8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint64 0 (intrinsicop u64 vector_get_element_v1u64 (dread u64 %vec_uint64x1, dread i32 %scalar_int32))
  scalar_uint64 = __builtin_mpl_vector_get_element_v1u64(vec_uint64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint32 0 (intrinsicop u32 vector_get_element_v2u32 (dread v2u32 %vec_uint32x2, dread i32 %scalar_int32))
  scalar_uint32 = __builtin_mpl_vector_get_element_v2u32(vec_uint32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint16 0 (intrinsicop u16 vector_get_element_v4u16 (dread v4u16 %vec_uint16x4, dread i32 %scalar_int32))
  scalar_uint16 = __builtin_mpl_vector_get_element_v4u16(vec_uint16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint8 0 (intrinsicop u8 vector_get_element_v8u8 (dread v8u8 %vec_uint8x8, dread i32 %scalar_int32))
  scalar_uint8 = __builtin_mpl_vector_get_element_v8u8(vec_uint8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float64 0 (intrinsicop f64 vector_get_element_v1f64 (dread f64 %vec_float64x1, dread i32 %scalar_int32))
  scalar_float64 = __builtin_mpl_vector_get_element_v1f64(vec_float64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float32 0 (intrinsicop f32 vector_get_element_v2f32 (dread v2f32 %vec_float32x2, dread i32 %scalar_int32))
  scalar_float32 = __builtin_mpl_vector_get_element_v2f32(vec_float32x2, scalar_int32);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_set_element_v2i64 (dread i64 %scalar_int64, dread v2i64 %vec_int64x2, dread i32 %scalar_int32))
  vec_int64x2 = __builtin_mpl_vector_set_element_v2i64(scalar_int64, vec_int64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_set_element_v4i32 (dread i32 %scalar_int32, dread v4i32 %vec_int32x4, dread i32 %scalar_int32))
  vec_int32x4 = __builtin_mpl_vector_set_element_v4i32(scalar_int32, vec_int32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_set_element_v8i16 (dread i32 %scalar_int16, dread v8i16 %vec_int16x8, dread i32 %scalar_int32))
  vec_int16x8 = __builtin_mpl_vector_set_element_v8i16(scalar_int16, vec_int16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (intrinsicop v16i8 vector_set_element_v16i8 (dread i32 %scalar_int8, dread v16i8 %vec_int8x16, dread i32 %scalar_int32))
  vec_int8x16 = __builtin_mpl_vector_set_element_v16i8(scalar_int8, vec_int8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_set_element_v2u64 (dread u64 %scalar_uint64, dread v2u64 %vec_uint64x2, dread i32 %scalar_int32))
  vec_uint64x2 = __builtin_mpl_vector_set_element_v2u64(scalar_uint64, vec_uint64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_set_element_v4u32 (dread u32 %scalar_uint32, dread v4u32 %vec_uint32x4, dread i32 %scalar_int32))
  vec_uint32x4 = __builtin_mpl_vector_set_element_v4u32(scalar_uint32, vec_uint32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_set_element_v8u16 (dread u32 %scalar_uint16, dread v8u16 %vec_uint16x8, dread i32 %scalar_int32))
  vec_uint16x8 = __builtin_mpl_vector_set_element_v8u16(scalar_uint16, vec_uint16x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (intrinsicop v16u8 vector_set_element_v16u8 (dread u32 %scalar_uint8, dread v16u8 %vec_uint8x16, dread i32 %scalar_int32))
  vec_uint8x16 = __builtin_mpl_vector_set_element_v16u8(scalar_uint8, vec_uint8x16, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (intrinsicop v2f64 vector_set_element_v2f64 (dread f64 %scalar_float64, dread v2f64 %vec_float64x2, dread i32 %scalar_int32))
  vec_float64x2 = __builtin_mpl_vector_set_element_v2f64(scalar_float64, vec_float64x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (intrinsicop v4f32 vector_set_element_v4f32 (dread f32 %scalar_float32, dread v4f32 %vec_float32x4, dread i32 %scalar_int32))
  vec_float32x4 = __builtin_mpl_vector_set_element_v4f32(scalar_float32, vec_float32x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_set_element_v1i64 (dread i64 %scalar_int64, dread i64 %vec_int64x1, dread i32 %scalar_int32))
  vec_int64x1 = __builtin_mpl_vector_set_element_v1i64(scalar_int64, vec_int64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_set_element_v2i32 (dread i32 %scalar_int32, dread v2i32 %vec_int32x2, dread i32 %scalar_int32))
  vec_int32x2 = __builtin_mpl_vector_set_element_v2i32(scalar_int32, vec_int32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_set_element_v4i16 (dread i32 %scalar_int16, dread v4i16 %vec_int16x4, dread i32 %scalar_int32))
  vec_int16x4 = __builtin_mpl_vector_set_element_v4i16(scalar_int16, vec_int16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_set_element_v8i8 (dread i32 %scalar_int8, dread v8i8 %vec_int8x8, dread i32 %scalar_int32))
  vec_int8x8 = __builtin_mpl_vector_set_element_v8i8(scalar_int8, vec_int8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_set_element_v1u64 (dread u64 %scalar_uint64, dread u64 %vec_uint64x1, dread i32 %scalar_int32))
  vec_uint64x1 = __builtin_mpl_vector_set_element_v1u64(scalar_uint64, vec_uint64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_set_element_v2u32 (dread u32 %scalar_uint32, dread v2u32 %vec_uint32x2, dread i32 %scalar_int32))
  vec_uint32x2 = __builtin_mpl_vector_set_element_v2u32(scalar_uint32, vec_uint32x2, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_set_element_v4u16 (dread u32 %scalar_uint16, dread v4u16 %vec_uint16x4, dread i32 %scalar_int32))
  vec_uint16x4 = __builtin_mpl_vector_set_element_v4u16(scalar_uint16, vec_uint16x4, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_set_element_v8u8 (dread u32 %scalar_uint8, dread v8u8 %vec_uint8x8, dread i32 %scalar_int32))
  vec_uint8x8 = __builtin_mpl_vector_set_element_v8u8(scalar_uint8, vec_uint8x8, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_set_element_v1f64 (dread f64 %scalar_float64, dread f64 %vec_float64x1, dread i32 %scalar_int32))
  vec_float64x1 = __builtin_mpl_vector_set_element_v1f64(scalar_float64, vec_float64x1, scalar_int32);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_set_element_v2f32 (dread f32 %scalar_float32, dread v2f32 %vec_float32x2, dread i32 %scalar_int32))
  vec_float32x2 = __builtin_mpl_vector_set_element_v2f32(scalar_float32, vec_float32x2, scalar_int32);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_narrow_low_v2i64 (dread v2i64 %vec_int64x2))
  vec_int32x2 = __builtin_mpl_vector_narrow_low_v2i64(vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_narrow_low_v4i32 (dread v4i32 %vec_int32x4))
  vec_int16x4 = __builtin_mpl_vector_narrow_low_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_narrow_low_v8i16 (dread v8i16 %vec_int16x8))
  vec_int8x8 = __builtin_mpl_vector_narrow_low_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_narrow_low_v2u64 (dread v2u64 %vec_uint64x2))
  vec_uint32x2 = __builtin_mpl_vector_narrow_low_v2u64(vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_narrow_low_v4u32 (dread v4u32 %vec_uint32x4))
  vec_uint16x4 = __builtin_mpl_vector_narrow_low_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_narrow_low_v8u16 (dread v8u16 %vec_uint16x8))
  vec_uint8x8 = __builtin_mpl_vector_narrow_low_v8u16(vec_uint16x8);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_pairwise_add_v4i32 (dread v4i32 %vec_int32x4))
  vec_int64x2 = __builtin_mpl_vector_pairwise_add_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_pairwise_add_v8i16 (dread v8i16 %vec_int16x8))
  vec_int32x4 = __builtin_mpl_vector_pairwise_add_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_pairwise_add_v16i8 (dread v16i8 %vec_int8x16))
  vec_int16x8 = __builtin_mpl_vector_pairwise_add_v16i8(vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_pairwise_add_v4u32 (dread v4u32 %vec_uint32x4))
  vec_uint64x2 = __builtin_mpl_vector_pairwise_add_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_pairwise_add_v8u16 (dread v8u16 %vec_uint16x8))
  vec_uint32x4 = __builtin_mpl_vector_pairwise_add_v8u16(vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_pairwise_add_v16u8 (dread v16u8 %vec_uint8x16))
  vec_uint16x8 = __builtin_mpl_vector_pairwise_add_v16u8(vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_pairwise_add_v2i32 (dread v2i32 %vec_int32x2))
  vec_int64x1 = __builtin_mpl_vector_pairwise_add_v2i32(vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_pairwise_add_v4i16 (dread v4i16 %vec_int16x4))
  vec_int32x2 = __builtin_mpl_vector_pairwise_add_v4i16(vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_pairwise_add_v8i8 (dread v8i8 %vec_int8x8))
  vec_int16x4 = __builtin_mpl_vector_pairwise_add_v8i8(vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_pairwise_add_v2u32 (dread v2u32 %vec_uint32x2))
  vec_uint64x1 = __builtin_mpl_vector_pairwise_add_v2u32(vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_pairwise_add_v4u16 (dread v4u16 %vec_uint16x4))
  vec_uint32x2 = __builtin_mpl_vector_pairwise_add_v4u16(vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_pairwise_add_v8u8 (dread v8u8 %vec_uint8x8))
  vec_uint16x4 = __builtin_mpl_vector_pairwise_add_v8u8(vec_uint8x8);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_reverse_v2i64 (dread v2i64 %vec_int64x2))
  vec_int64x2 = __builtin_mpl_vector_reverse_v2i64(vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_reverse_v4i32 (dread v4i32 %vec_int32x4))
  vec_int32x4 = __builtin_mpl_vector_reverse_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_reverse_v8i16 (dread v8i16 %vec_int16x8))
  vec_int16x8 = __builtin_mpl_vector_reverse_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (intrinsicop v16i8 vector_reverse_v16i8 (dread v16i8 %vec_int8x16))
  vec_int8x16 = __builtin_mpl_vector_reverse_v16i8(vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_reverse_v2u64 (dread v2u64 %vec_uint64x2))
  vec_uint64x2 = __builtin_mpl_vector_reverse_v2u64(vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_reverse_v4u32 (dread v4u32 %vec_uint32x4))
  vec_uint32x4 = __builtin_mpl_vector_reverse_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_reverse_v8u16 (dread v8u16 %vec_uint16x8))
  vec_uint16x8 = __builtin_mpl_vector_reverse_v8u16(vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (intrinsicop v16u8 vector_reverse_v16u8 (dread v16u8 %vec_uint8x16))
  vec_uint8x16 = __builtin_mpl_vector_reverse_v16u8(vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (intrinsicop v2f64 vector_reverse_v2f64 (dread v2f64 %vec_float64x2))
  vec_float64x2 = __builtin_mpl_vector_reverse_v2f64(vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (intrinsicop v4f32 vector_reverse_v4f32 (dread v4f32 %vec_float32x4))
  vec_float32x4 = __builtin_mpl_vector_reverse_v4f32(vec_float32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_reverse_v1i64 (dread i64 %vec_int64x1))
  vec_int64x1 = __builtin_mpl_vector_reverse_v1i64(vec_int64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_reverse_v2i32 (dread v2i32 %vec_int32x2))
  vec_int32x2 = __builtin_mpl_vector_reverse_v2i32(vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_reverse_v4i16 (dread v4i16 %vec_int16x4))
  vec_int16x4 = __builtin_mpl_vector_reverse_v4i16(vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_reverse_v8i8 (dread v8i8 %vec_int8x8))
  vec_int8x8 = __builtin_mpl_vector_reverse_v8i8(vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_reverse_v1u64 (dread u64 %vec_uint64x1))
  vec_uint64x1 = __builtin_mpl_vector_reverse_v1u64(vec_uint64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_reverse_v2u32 (dread v2u32 %vec_uint32x2))
  vec_uint32x2 = __builtin_mpl_vector_reverse_v2u32(vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_reverse_v4u16 (dread v4u16 %vec_uint16x4))
  vec_uint16x4 = __builtin_mpl_vector_reverse_v4u16(vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_reverse_v8u8 (dread v8u8 %vec_uint8x8))
  vec_uint8x8 = __builtin_mpl_vector_reverse_v8u8(vec_uint8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_reverse_v1f64 (dread f64 %vec_float64x1))
  vec_float64x1 = __builtin_mpl_vector_reverse_v1f64(vec_float64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_reverse_v2f32 (dread v2f32 %vec_float32x2))
  vec_float32x2 = __builtin_mpl_vector_reverse_v2f32(vec_float32x2);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (shl v2i64 (dread v2i64 %vec_int64x2, constval i32 4))
  vec_int64x2 = __builtin_mpl_vector_shli_v2i64(vec_int64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (shl v4i32 (dread v4i32 %vec_int32x4, constval i32 4))
  vec_int32x4 = __builtin_mpl_vector_shli_v4i32(vec_int32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (shl v8i16 (dread v8i16 %vec_int16x8, constval i32 4))
  vec_int16x8 = __builtin_mpl_vector_shli_v8i16(vec_int16x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (shl v16i8 (dread v16i8 %vec_int8x16, constval i32 4))
  vec_int8x16 = __builtin_mpl_vector_shli_v16i8(vec_int8x16, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (shl v2u64 (dread v2u64 %vec_uint64x2, constval i32 4))
  vec_uint64x2 = __builtin_mpl_vector_shli_v2u64(vec_uint64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (shl v4u32 (dread v4u32 %vec_uint32x4, constval i32 4))
  vec_uint32x4 = __builtin_mpl_vector_shli_v4u32(vec_uint32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (shl v8u16 (dread v8u16 %vec_uint16x8, constval i32 4))
  vec_uint16x8 = __builtin_mpl_vector_shli_v8u16(vec_uint16x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (shl v16u8 (dread v16u8 %vec_uint8x16, constval i32 4))
  vec_uint8x16 = __builtin_mpl_vector_shli_v16u8(vec_uint8x16, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (shl i64 (dread i64 %vec_int64x1, constval i32 4))
  vec_int64x1 = __builtin_mpl_vector_shli_v1i64(vec_int64x1, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (shl v2i32 (dread v2i32 %vec_int32x2, constval i32 4))
  vec_int32x2 = __builtin_mpl_vector_shli_v2i32(vec_int32x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (shl v4i16 (dread v4i16 %vec_int16x4, constval i32 4))
  vec_int16x4 = __builtin_mpl_vector_shli_v4i16(vec_int16x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (shl v8i8 (dread v8i8 %vec_int8x8, constval i32 4))
  vec_int8x8 = __builtin_mpl_vector_shli_v8i8(vec_int8x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (shl u64 (dread u64 %vec_uint64x1, constval i32 4))
  vec_uint64x1 = __builtin_mpl_vector_shli_v1u64(vec_uint64x1, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (shl v2u32 (dread v2u32 %vec_uint32x2, constval i32 4))
  vec_uint32x2 = __builtin_mpl_vector_shli_v2u32(vec_uint32x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (shl v4u16 (dread v4u16 %vec_uint16x4, constval i32 4))
  vec_uint16x4 = __builtin_mpl_vector_shli_v4u16(vec_uint16x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (shl v8u8 (dread v8u8 %vec_uint8x8, constval i32 4))
  vec_uint8x8 = __builtin_mpl_vector_shli_v8u8(vec_uint8x8, 4);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (lshr v2i64 (dread v2i64 %vec_int64x2, constval i32 4))
  vec_int64x2 = __builtin_mpl_vector_shri_v2i64(vec_int64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (lshr v4i32 (dread v4i32 %vec_int32x4, constval i32 4))
  vec_int32x4 = __builtin_mpl_vector_shri_v4i32(vec_int32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (lshr v8i16 (dread v8i16 %vec_int16x8, constval i32 4))
  vec_int16x8 = __builtin_mpl_vector_shri_v8i16(vec_int16x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (lshr v16i8 (dread v16i8 %vec_int8x16, constval i32 4))
  vec_int8x16 = __builtin_mpl_vector_shri_v16i8(vec_int8x16, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (lshr v2u64 (dread v2u64 %vec_uint64x2, constval i32 4))
  vec_uint64x2 = __builtin_mpl_vector_shri_v2u64(vec_uint64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (lshr v4u32 (dread v4u32 %vec_uint32x4, constval i32 4))
  vec_uint32x4 = __builtin_mpl_vector_shri_v4u32(vec_uint32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (lshr v8u16 (dread v8u16 %vec_uint16x8, constval i32 4))
  vec_uint16x8 = __builtin_mpl_vector_shri_v8u16(vec_uint16x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (lshr v16u8 (dread v16u8 %vec_uint8x16, constval i32 4))
  vec_uint8x16 = __builtin_mpl_vector_shri_v16u8(vec_uint8x16, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (lshr i64 (dread i64 %vec_int64x1, constval i32 4))
  vec_int64x1 = __builtin_mpl_vector_shri_v1i64(vec_int64x1, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (lshr v2i32 (dread v2i32 %vec_int32x2, constval i32 4))
  vec_int32x2 = __builtin_mpl_vector_shri_v2i32(vec_int32x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (lshr v4i16 (dread v4i16 %vec_int16x4, constval i32 4))
  vec_int16x4 = __builtin_mpl_vector_shri_v4i16(vec_int16x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (lshr v8i8 (dread v8i8 %vec_int8x8, constval i32 4))
  vec_int8x8 = __builtin_mpl_vector_shri_v8i8(vec_int8x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (lshr u64 (dread u64 %vec_uint64x1, constval i32 4))
  vec_uint64x1 = __builtin_mpl_vector_shri_v1u64(vec_uint64x1, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (lshr v2u32 (dread v2u32 %vec_uint32x2, constval i32 4))
  vec_uint32x2 = __builtin_mpl_vector_shri_v2u32(vec_uint32x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (lshr v4u16 (dread v4u16 %vec_uint16x4, constval i32 4))
  vec_uint16x4 = __builtin_mpl_vector_shri_v4u16(vec_uint16x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (lshr v8u8 (dread v8u8 %vec_uint8x8, constval i32 4))
  vec_uint8x8 = __builtin_mpl_vector_shri_v8u8(vec_uint8x8, 4);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_shr_narrow_low_v2i64 (dread v2i64 %vec_int64x2, constval i32 4))
  vec_int32x2 = __builtin_mpl_vector_shr_narrow_low_v2i64(vec_int64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_shr_narrow_low_v4i32 (dread v4i32 %vec_int32x4, constval i32 4))
  vec_int16x4 = __builtin_mpl_vector_shr_narrow_low_v4i32(vec_int32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_shr_narrow_low_v8i16 (dread v8i16 %vec_int16x8, constval i32 4))
  vec_int8x8 = __builtin_mpl_vector_shr_narrow_low_v8i16(vec_int16x8, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_shr_narrow_low_v2u64 (dread v2u64 %vec_uint64x2, constval i32 4))
  vec_uint32x2 = __builtin_mpl_vector_shr_narrow_low_v2u64(vec_uint64x2, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_shr_narrow_low_v4u32 (dread v4u32 %vec_uint32x4, constval i32 4))
  vec_uint16x4 = __builtin_mpl_vector_shr_narrow_low_v4u32(vec_uint32x4, 4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_shr_narrow_low_v8u16 (dread v8u16 %vec_uint16x8, constval i32 4))
  vec_uint8x8 = __builtin_mpl_vector_shr_narrow_low_v8u16(vec_uint16x8, 4);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int64 0 (intrinsicop i64 vector_sum_v2i64 (dread v2i64 %vec_int64x2))
  scalar_int64 = __builtin_mpl_vector_sum_v2i64(vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int32 0 (intrinsicop i32 vector_sum_v4i32 (dread v4i32 %vec_int32x4))
  scalar_int32 = __builtin_mpl_vector_sum_v4i32(vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int16 0 (intrinsicop i16 vector_sum_v8i16 (dread v8i16 %vec_int16x8))
  scalar_int16 = __builtin_mpl_vector_sum_v8i16(vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int8 0 (intrinsicop i8 vector_sum_v16i8 (dread v16i8 %vec_int8x16))
  scalar_int8 = __builtin_mpl_vector_sum_v16i8(vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint64 0 (intrinsicop u64 vector_sum_v2u64 (dread v2u64 %vec_uint64x2))
  scalar_uint64 = __builtin_mpl_vector_sum_v2u64(vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint32 0 (intrinsicop u32 vector_sum_v4u32 (dread v4u32 %vec_uint32x4))
  scalar_uint32 = __builtin_mpl_vector_sum_v4u32(vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint16 0 (intrinsicop u16 vector_sum_v8u16 (dread v8u16 %vec_uint16x8))
  scalar_uint16 = __builtin_mpl_vector_sum_v8u16(vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint8 0 (intrinsicop u8 vector_sum_v16u8 (dread v16u8 %vec_uint8x16))
  scalar_uint8 = __builtin_mpl_vector_sum_v16u8(vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float64 0 (intrinsicop f64 vector_sum_v2f64 (dread v2f64 %vec_float64x2))
  scalar_float64 = __builtin_mpl_vector_sum_v2f64(vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float32 0 (intrinsicop f32 vector_sum_v4f32 (dread v4f32 %vec_float32x4))
  scalar_float32 = __builtin_mpl_vector_sum_v4f32(vec_float32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int32 0 (intrinsicop i32 vector_sum_v2i32 (dread v2i32 %vec_int32x2))
  scalar_int32 = __builtin_mpl_vector_sum_v2i32(vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int16 0 (intrinsicop i16 vector_sum_v4i16 (dread v4i16 %vec_int16x4))
  scalar_int16 = __builtin_mpl_vector_sum_v4i16(vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_int8 0 (intrinsicop i8 vector_sum_v8i8 (dread v8i8 %vec_int8x8))
  scalar_int8 = __builtin_mpl_vector_sum_v8i8(vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint32 0 (intrinsicop u32 vector_sum_v2u32 (dread v2u32 %vec_uint32x2))
  scalar_uint32 = __builtin_mpl_vector_sum_v2u32(vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint16 0 (intrinsicop u16 vector_sum_v4u16 (dread v4u16 %vec_uint16x4))
  scalar_uint16 = __builtin_mpl_vector_sum_v4u16(vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_uint8 0 (intrinsicop u8 vector_sum_v8u8 (dread v8u8 %vec_uint8x8))
  scalar_uint8 = __builtin_mpl_vector_sum_v8u8(vec_uint8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %scalar_float32 0 (intrinsicop f32 vector_sum_v2f32 (dread v2f32 %vec_float32x2))
  scalar_float32 = __builtin_mpl_vector_sum_v2f32(vec_float32x2);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (intrinsicop v2i64 vector_table_lookup_v2i64 (dread v2i64 %vec_int64x2, dread v2i64 %vec_int64x2))
  vec_int64x2 = __builtin_mpl_vector_table_lookup_v2i64(vec_int64x2, vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (intrinsicop v4i32 vector_table_lookup_v4i32 (dread v4i32 %vec_int32x4, dread v4i32 %vec_int32x4))
  vec_int32x4 = __builtin_mpl_vector_table_lookup_v4i32(vec_int32x4, vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (intrinsicop v8i16 vector_table_lookup_v8i16 (dread v8i16 %vec_int16x8, dread v8i16 %vec_int16x8))
  vec_int16x8 = __builtin_mpl_vector_table_lookup_v8i16(vec_int16x8, vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (intrinsicop v16i8 vector_table_lookup_v16i8 (dread v16i8 %vec_int8x16, dread v16i8 %vec_int8x16))
  vec_int8x16 = __builtin_mpl_vector_table_lookup_v16i8(vec_int8x16, vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (intrinsicop v2u64 vector_table_lookup_v2u64 (dread v2u64 %vec_uint64x2, dread v2u64 %vec_uint64x2))
  vec_uint64x2 = __builtin_mpl_vector_table_lookup_v2u64(vec_uint64x2, vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (intrinsicop v4u32 vector_table_lookup_v4u32 (dread v4u32 %vec_uint32x4, dread v4u32 %vec_uint32x4))
  vec_uint32x4 = __builtin_mpl_vector_table_lookup_v4u32(vec_uint32x4, vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (intrinsicop v8u16 vector_table_lookup_v8u16 (dread v8u16 %vec_uint16x8, dread v8u16 %vec_uint16x8))
  vec_uint16x8 = __builtin_mpl_vector_table_lookup_v8u16(vec_uint16x8, vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (intrinsicop v16u8 vector_table_lookup_v16u8 (dread v16u8 %vec_uint8x16, dread v16u8 %vec_uint8x16))
  vec_uint8x16 = __builtin_mpl_vector_table_lookup_v16u8(vec_uint8x16, vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (intrinsicop v2f64 vector_table_lookup_v2f64 (dread v2f64 %vec_float64x2, dread v2f64 %vec_float64x2))
  vec_float64x2 = __builtin_mpl_vector_table_lookup_v2f64(vec_float64x2, vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (intrinsicop v4f32 vector_table_lookup_v4f32 (dread v4f32 %vec_float32x4, dread v4f32 %vec_float32x4))
  vec_float32x4 = __builtin_mpl_vector_table_lookup_v4f32(vec_float32x4, vec_float32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (intrinsicop i64 vector_table_lookup_v1i64 (dread i64 %vec_int64x1, dread i64 %vec_int64x1))
  vec_int64x1 = __builtin_mpl_vector_table_lookup_v1i64(vec_int64x1, vec_int64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (intrinsicop v2i32 vector_table_lookup_v2i32 (dread v2i32 %vec_int32x2, dread v2i32 %vec_int32x2))
  vec_int32x2 = __builtin_mpl_vector_table_lookup_v2i32(vec_int32x2, vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (intrinsicop v4i16 vector_table_lookup_v4i16 (dread v4i16 %vec_int16x4, dread v4i16 %vec_int16x4))
  vec_int16x4 = __builtin_mpl_vector_table_lookup_v4i16(vec_int16x4, vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (intrinsicop v8i8 vector_table_lookup_v8i8 (dread v8i8 %vec_int8x8, dread v8i8 %vec_int8x8))
  vec_int8x8 = __builtin_mpl_vector_table_lookup_v8i8(vec_int8x8, vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (intrinsicop u64 vector_table_lookup_v1u64 (dread u64 %vec_uint64x1, dread u64 %vec_uint64x1))
  vec_uint64x1 = __builtin_mpl_vector_table_lookup_v1u64(vec_uint64x1, vec_uint64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (intrinsicop v2u32 vector_table_lookup_v2u32 (dread v2u32 %vec_uint32x2, dread v2u32 %vec_uint32x2))
  vec_uint32x2 = __builtin_mpl_vector_table_lookup_v2u32(vec_uint32x2, vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (intrinsicop v4u16 vector_table_lookup_v4u16 (dread v4u16 %vec_uint16x4, dread v4u16 %vec_uint16x4))
  vec_uint16x4 = __builtin_mpl_vector_table_lookup_v4u16(vec_uint16x4, vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (intrinsicop v8u8 vector_table_lookup_v8u8 (dread v8u8 %vec_uint8x8, dread v8u8 %vec_uint8x8))
  vec_uint8x8 = __builtin_mpl_vector_table_lookup_v8u8(vec_uint8x8, vec_uint8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (intrinsicop f64 vector_table_lookup_v1f64 (dread f64 %vec_float64x1, dread f64 %vec_float64x1))
  vec_float64x1 = __builtin_mpl_vector_table_lookup_v1f64(vec_float64x1, vec_float64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (intrinsicop v2f32 vector_table_lookup_v2f32 (dread v2f32 %vec_float32x2, dread v2f32 %vec_float32x2))
  vec_float32x2 = __builtin_mpl_vector_table_lookup_v2f32(vec_float32x2, vec_float32x2);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v2i32 (dread v2i32 %vec_int32x2, dread v2i32 %vec_int32x2) { dassign %_result[[#RESNUM:]]   0 }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_int32x2x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_int32x2x2 = __builtin_mpl_vector_zip_v2i32(vec_int32x2, vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v4i16 (dread v4i16 %vec_int16x4, dread v4i16 %vec_int16x4) { dassign             %_result[[#RESNUM:]] 0 }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_int16x4x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_int16x4x2 = __builtin_mpl_vector_zip_v4i16(vec_int16x4, vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v8i8 (dread v8i8 %vec_int8x8, dread v8i8 %vec_int8x8) { dassign %_result[[#RESNUM:]] 0  }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_int8x8x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_int8x8x2 = __builtin_mpl_vector_zip_v8i8(vec_int8x8, vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v2u32 (dread v2u32 %vec_uint32x2, dread v2u32 %vec_uint32x2) { dassign           %_result[[#RESNUM:]] 0 }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_uint32x2x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_uint32x2x2 = __builtin_mpl_vector_zip_v2u32(vec_uint32x2, vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v4u16 (dread v4u16 %vec_uint16x4, dread v4u16 %vec_uint16x4) { dassign           %_result[[#RESNUM:]] 0 }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_uint16x4x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_uint16x4x2 = __builtin_mpl_vector_zip_v4u16(vec_uint16x4, vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v8u8 (dread v8u8 %vec_uint8x8, dread v8u8 %vec_uint8x8) { dassign %_result[[#RESNUM:]]  0 }
  // CHECK-NEXT: dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT: dassign %vec_uint8x8x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_uint8x8x2 = __builtin_mpl_vector_zip_v8u8(vec_uint8x8, vec_uint8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 4 ]]{{$}}
  // CHECK-NEXT: intrinsiccallassigned vector_zip_v2f32 (dread v2f32 %vec_float32x2, dread v2f32 %vec_float32x2) { dassign         %_result[[#RESNUM:]] 0 }
  // CHECK-NEXT:  dassign %_resultStruct[[#RESNUM]] 0 (dread agg %_result[[#RESNUM]])
  // CHECK-NEXT:  dassign %vec_float32x2x2 0 (dread agg %_resultStruct[[#RESNUM]])
  vec_float32x2x2 = __builtin_mpl_vector_zip_v2f32(vec_float32x2, vec_float32x2);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x2 0 (iread v2i64 <* v2i64> 0 (dread a64 %ptr))
  vec_int64x2 = __builtin_mpl_vector_load_v2i64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x4 0 (iread v4i32 <* v4i32> 0 (dread a64 %ptr))
  vec_int32x4 = __builtin_mpl_vector_load_v4i32(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x8 0 (iread v8i16 <* v8i16> 0 (dread a64 %ptr))
  vec_int16x8 = __builtin_mpl_vector_load_v8i16(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x16 0 (iread v16i8 <* v16i8> 0 (dread a64 %ptr))
  vec_int8x16 = __builtin_mpl_vector_load_v16i8(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x2 0 (iread v2u64 <* v2u64> 0 (dread a64 %ptr))
  vec_uint64x2 = __builtin_mpl_vector_load_v2u64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x4 0 (iread v4u32 <* v4u32> 0 (dread a64 %ptr))
  vec_uint32x4 = __builtin_mpl_vector_load_v4u32(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x8 0 (iread v8u16 <* v8u16> 0 (dread a64 %ptr))
  vec_uint16x8 = __builtin_mpl_vector_load_v8u16(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x16 0 (iread v16u8 <* v16u8> 0 (dread a64 %ptr))
  vec_uint8x16 = __builtin_mpl_vector_load_v16u8(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x2 0 (iread v2f64 <* v2f64> 0 (dread a64 %ptr))
  vec_float64x2 = __builtin_mpl_vector_load_v2f64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x4 0 (iread v4f32 <* v4f32> 0 (dread a64 %ptr))
  vec_float32x4 = __builtin_mpl_vector_load_v4f32(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int64x1 0 (iread i64 <* i64> 0 (dread a64 %ptr))
  vec_int64x1 = __builtin_mpl_vector_load_v1i64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int32x2 0 (iread v2i32 <* v2i32> 0 (dread a64 %ptr))
  vec_int32x2 = __builtin_mpl_vector_load_v2i32(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int16x4 0 (iread v4i16 <* v4i16> 0 (dread a64 %ptr))
  vec_int16x4 = __builtin_mpl_vector_load_v4i16(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_int8x8 0 (iread v8i8 <* v8i8> 0 (dread a64 %ptr))
  vec_int8x8 = __builtin_mpl_vector_load_v8i8(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint64x1 0 (iread u64 <* u64> 0 (dread a64 %ptr))
  vec_uint64x1 = __builtin_mpl_vector_load_v1u64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint32x2 0 (iread v2u32 <* v2u32> 0 (dread a64 %ptr))
  vec_uint32x2 = __builtin_mpl_vector_load_v2u32(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint16x4 0 (iread v4u16 <* v4u16> 0 (dread a64 %ptr))
  vec_uint16x4 = __builtin_mpl_vector_load_v4u16(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_uint8x8 0 (iread v8u8 <* v8u8> 0 (dread a64 %ptr))
  vec_uint8x8 = __builtin_mpl_vector_load_v8u8(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float64x1 0 (iread f64 <* f64> 0 (dread a64 %ptr))
  vec_float64x1 = __builtin_mpl_vector_load_v1f64(ptr);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: dassign %vec_float32x2 0 (iread v2f32 <* v2f32> 0 (dread a64 %ptr))
  vec_float32x2 = __builtin_mpl_vector_load_v2f32(ptr);

  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2i64> 0 (dread a64 %ptr, dread v2i64 %vec_int64x2)
  __builtin_mpl_vector_store_v2i64(ptr, vec_int64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v4i32> 0 (dread a64 %ptr, dread v4i32 %vec_int32x4)
  __builtin_mpl_vector_store_v4i32(ptr, vec_int32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v8i16> 0 (dread a64 %ptr, dread v8i16 %vec_int16x8)
  __builtin_mpl_vector_store_v8i16(ptr, vec_int16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v16i8> 0 (dread a64 %ptr, dread v16i8 %vec_int8x16)
  __builtin_mpl_vector_store_v16i8(ptr, vec_int8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2u64> 0 (dread a64 %ptr, dread v2u64 %vec_uint64x2)
  __builtin_mpl_vector_store_v2u64(ptr, vec_uint64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v4u32> 0 (dread a64 %ptr, dread v4u32 %vec_uint32x4)
  __builtin_mpl_vector_store_v4u32(ptr, vec_uint32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v8u16> 0 (dread a64 %ptr, dread v8u16 %vec_uint16x8)
  __builtin_mpl_vector_store_v8u16(ptr, vec_uint16x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v16u8> 0 (dread a64 %ptr, dread v16u8 %vec_uint8x16)
  __builtin_mpl_vector_store_v16u8(ptr, vec_uint8x16);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2f64> 0 (dread a64 %ptr, dread v2f64 %vec_float64x2)
  __builtin_mpl_vector_store_v2f64(ptr, vec_float64x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v4f32> 0 (dread a64 %ptr, dread v4f32 %vec_float32x4)
  __builtin_mpl_vector_store_v4f32(ptr, vec_float32x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* i64> 0 (dread a64 %ptr, dread i64 %vec_int64x1)
  __builtin_mpl_vector_store_v1i64(ptr, vec_int64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2i32> 0 (dread a64 %ptr, dread v2i32 %vec_int32x2)
  __builtin_mpl_vector_store_v2i32(ptr, vec_int32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v4i16> 0 (dread a64 %ptr, dread v4i16 %vec_int16x4)
  __builtin_mpl_vector_store_v4i16(ptr, vec_int16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v8i8> 0 (dread a64 %ptr, dread v8i8 %vec_int8x8)
  __builtin_mpl_vector_store_v8i8(ptr, vec_int8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* u64> 0 (dread a64 %ptr, dread u64 %vec_uint64x1)
  __builtin_mpl_vector_store_v1u64(ptr, vec_uint64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2u32> 0 (dread a64 %ptr, dread v2u32 %vec_uint32x2)
  __builtin_mpl_vector_store_v2u32(ptr, vec_uint32x2);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v4u16> 0 (dread a64 %ptr, dread v4u16 %vec_uint16x4)
  __builtin_mpl_vector_store_v4u16(ptr, vec_uint16x4);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v8u8> 0 (dread a64 %ptr, dread v8u8 %vec_uint8x8)
  __builtin_mpl_vector_store_v8u8(ptr, vec_uint8x8);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* f64> 0 (dread a64 %ptr, dread f64 %vec_float64x1)
  __builtin_mpl_vector_store_v1f64(ptr, vec_float64x1);
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: iassign <* v2f32> 0 (dread a64 %ptr, dread v2f32 %vec_float32x2)
  __builtin_mpl_vector_store_v2f32(ptr, vec_float32x2);

  // Neon's vreinterpret* intrinsics should become retype nodes in Maple
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: retype v4u32 <v4u32> (dread v2u64 %vec_uint64x2)
  (uint32x4_t)vec_uint64x2;
  // CHECK: LOC [[# FILENUM]] [[# @LINE + 2 ]]{{$}}
  // CHECK-NEXT: retype v2u64 <v2u64> (dread v16u8 %vec_uint8x16)
  (uint64x2_t)vec_uint8x16;
}
